Workshop Notification 2016 :: 2 Days FDP in VLSI Technology, Bangalore

Workshop Notification 2016 :: 2 Days FDP in VLSI Technology, Bangalore

Conference Educational

Sat, Sep 03, 2016, 02:30 PM -  Sun, Sep 04, 2016, 10:30 PM

Contact details
Organiser : Maven Silicon
Location details
#37, 1st Floor, 2nd Cross, GK Govinda Reddy Layout,
Arekere mico layout , Bannerghatta road
Bengaluru - Karnataka
About us

Invitation from Maven Silicon!!

Maven Silicon, Bangalore is organizing a Faculty Development Program (FDP) on “Functional Verification” in collaboration with Aceic Design Technologies on 3rd and 4th,September 2016.

This workshop will give the participants an invaluable resource for those who are trying to gain insight about the current needs in the VLSI industry with Key Sessions delivered by non other than Mr. Sivakumar PR- Founder and CEO of Aceic Design Technologies. This workshop is aimed at and designed to provide a better exposure for faculty in the verification of digital circuits using front-end tools with hands on Lab Sessions . FDP mainly intends at familiarising the faculties with knowledge that are crucial for guiding students headed for semiconductor career.

About Key Resource Person

Sivakumar PR(Founder and CEO of Aceic Design Technologies)

Sivakumar is a seasoned engineering professional who has worked in various fields, including electrical engineering, academia and semiconductor industries for more than 18 years.

To know more about SivaKumar, please visit : LinkedIn


Workshop Agenda

ASIC Verification Methodologies

System Verilog HVL

Verification Planning and Management

UVM - Universal Verification Methodology

Current & future trends in Semiconductor Industry

Labs - Memory Design

Case Study - AHB UVC

What one gains?

Technical know-how on Functional Verification

Enhanced classroom delivery

Aid for research in VLSI / FPGA technology

Hands on experience with lab session

Platform for interaction among academicians and industry experts to discuss about the recent trends, developments, challenges and academic research activities in the field of VLSI.

Key take away:

1) Course Kit

2) FDP Certificate

3) Working Lunch, Tea & Snacks


Registration Fee includes FDP Kit, Lunch & Refreshments and participation in all programmes related to the FDP.

The details of registration fee are as follows:

                Early Bird Registration                            Registration

                    Rs. 3,000/-                                  Rs. 5,000/-

Early Bird Offer applicable up-to 30th June,2016
Kindly contact us for group discounts for 2 or more faculties joining from same college.

How to apply?

Step 1: Faculty members from Institutes affiliated to various Universities are encouraged to Register On-line for Workshop.


Step 2: After your on-line registration please wait for our call for confirmation. You will be provided with a Registration E-mail, on receipt of which you can make the registration payment as stated in the Registration E- Mail.

Step 3: E-mail us the details of Payment made and await for our Confirmation Mail.  

Selection Criteria

Selection of participants will be done on ‘First Come First Serve Basis’. Organizing committee’s decision will be final in selecting the participants.
Selected candidates should bring Official ID Card, failing which they will not be eligible to attend the workshop.

We look forward to welcoming you!!

In case of any ambiguities please feel free to call us on  080-49565395 / 9901278009 , or mail  us to


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